19DEC - JANSEMICONDUCTOR AND PACKAGING ADVANCEMENTS THAT ARE CRITICAL FOR OPTOELECTRONICS By Peter McNeil, Senior Marketing Communications Manager, Infinite ElectronicsThe world is speeding ahead towards global connectivity with advancements in 5G, IoT, and Wi-Fi, where the total amount of data created, captured, copied, and consumed globally was forecasted to reach 64.2 zettabytes in 2020 a number that is expected to double by 2025. All of this data must be seamlessly backhauled to and from the "cloud" the "5G core" or just the infrastructure of data centers meant to support this ever-increasing demand. While much of this is data center-to-user and data center-to-data center traffic (23 percent), the vast majority of this is traffic that remains within the datacenter. Supporting this global demand wirelessly has yielded technological leaps in smart spectrum usage, cell tower density, and even the use of non-terrestrial infrastructure, leveraging satellites as a tool for our networking needs. This densification can also be seen in terms of the fiber infrastructure and within data centers where adopting high speed Ethernet is necessary to expand data center capacity. Data centers are already phasing out of transceivers 10G and below and shifting from 40G to 100G transceivers. According to YoleDéveloppement, the optical transceiver market is expected to grow from $9.6 billion in 2020 to $20.9 billion in 2026, primarily driven by high data rate modules of 100G and beyond. This is all in spite of the COVID-19 pandemic where the needs for e-commerce, e-conferencing, cloud services, and video streaming only increased. The optical component problems that crop up with the increasing data densitySo how are OEMs, mobile network operators (MNOs), and data centers expected to support this newfound traffic load? The solutions vary for higher data rate 100G and beyond Ethernet where hyperscale data centers are already looking ahead at 400G. In the pluggable module, switch ASICs connect to a retimer (clock-and-date recovery) that synchronizes the data from the switch to the optical interface. The switching ASIC communicates to the transceiver through a metallic trace on the PCB which is increasingly lossy at high frequencies. As data rates increase, the length and loss of the trace make a retimer between the ASIC and transceiver module necessary. Today's Ethernet switch application specific integrated circuits (ASICs) have shifted to utilizing 56G PAM-4 SerDes for a 56 Gb/s lane rate with up to 256 ports for 12.8 Tb/s on a singular chip. Up to 25.6 Tb/s can also be achieved with 64 integrated 50G PAM4 or even 32 100G PAM4 SerDes cores. Despite the slowing of Moore's law, some of these ASICs are achieved using extremely small 7nm CMOS processes. However, these Ethernet switches must have a multiplicity of pluggable module ports on their front panel and twice as many electrical traces within to support the data rate. This has led to the potential shift from the standard pluggable module with a separate switching ASIC and pluggable optics to an embedded optics has strong potential to increase data center density. This can be accomplished with either an on-board optics module with the switching ASIC or by having the optical transceiver co-packaged with the switching ASIC. More immediate attempts to meet density, power consumption, bandwidth and data rate requirements, CXINSIGHTSPeter McNeil
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